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Decoupling capacitors

Question asked by diez.r on Feb 22, 2016
Latest reply on Feb 23, 2016 by wolff.roger
Hi all:

I am a software engineer with not much hardware experience. I am reading the following document:

AN4488
Getting started with STM32F4xxxx MCU hardware development
http://www.st.com/web/en/resource/technical/document/application_note/DM00115714.pdf

1) Section "2.2 Power supply schemes" says:

"The VDD pins must be connected to VDD with external decoupling capacitors: one single Tantalum or Ceramic
capacitor (min. 4.7 μF typ.10 μF) for the package + one 100 nF Ceramic capacitor for each VDD pin."

That would be a capacitor between each VDD pin and the power supply, or GND or VSS? See also below.


2) In "Figure 11" there is one capacitor between each VDD/VSS pair. These pairs are called VDD1/VSS1, VDD2/VSS2
and so on. The trouble is, there are no such names like "VDD1", "VSS2" and so on in the datasheet.

I looked at the LQFP144 package for the STM32F40x we are using, and while most VDD/VSS do come in pairs, some
do not. For example, VDD on pin 72 and VDD on pin 144 have no corresponding VSS pins. What should I do in those cases?


3) Section "7.4 Decoupling" says:

"In addition, each power supply pair should be decoupled with filtering Ceramic capacitors
(100 nF) and one single Tantalum or Ceramic capacitor (min. 4.7 μF typ.10 μF) connected
in parallel."

Figure 27 does show a capacitor between two neighbouring VDD and VSS pins.

I guess that sentece is not correctly phrased, and the 10 μF capacitor is not for each pair, but just one for
the whole chip, right? Or do I need 2 capacitors per VDD/VSS pair? Are those capacitors between each VDD/VSS
pair the same ones as described in part (1) [section 2.2] above?

Thanks in advance,
  rdiez

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