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STM32F429 crashes after RCC configuration

Question asked by c.kalhana on Jan 25, 2016
Latest reply on Jan 25, 2016 by c.kalhana
Hi,

I have an issue with the STM32F429 (Discovery board with 8 MHz crystal).
I created a Keil project (software pack based) and added the following SW packs:

CMIS: Core
CMIS: DSP
Device: Startup

Then I added the following main file:


#include "stdio.h"
#include "stm32f4xx.h"

// PLL register values
#define PLL_MASK 0x80BC8000  // PLL register mask
#define PLLM_VAL 4           // PLL division factor
#define PLLN_VAL 180          // PLL multiplication factor
#define PLLP_VAL 0          // 0: div by 2
#define PLLSRC_VAL 1         // HSE is source to PLL
#define PLLQ_VAL 2           // PLLQ: not used
#define PLLR_VAL 2           // PLLR


int main(void){
     
  RCC->CFGR = (RCC->CFGR & 0xFFFFFF0F);           // AHB prescaler : 1
  RCC->CFGR = (RCC->CFGR & 0xFFFFE3FF) | 0x1400;  // APB1 prescaler: 4
  RCC->CFGR = (RCC->CFGR & 0xFFFF1FFF) | 0x8000;  // APB2 prescaler: 2
  
  RCC->CR |= 0x10000;
  while((RCC->CR & 0x20000) != 0x20000){  // wait for HSE ready
  }
  
  RCC->PLLCFGR = (RCC->PLLCFGR & PLL_MASK) | ((PLLR_VAL << 28) | (PLLQ_VAL << 24) | (PLLSRC_VAL << 22) | (PLLP_VAL << 16) | (PLLN_VAL << 6) | PLLM_VAL);  // Setup PLL
  RCC->CR |= 0x1000000;  // Main PLL: ON
  while((RCC->CR & 0x2000000) != 0x2000000){  // wait for PLL ready
  }
  
  RCC->CFGR = (RCC->CFGR & 0xFFFFFFFC) | 0x02;  // PLL_P is selected as system clock
  while((RCC->CFGR & 0x08) != 0x08){  // wait PLL_P to be used as system clock
  }
     
     RCC->CR = RCC->CR & 0xFFFFFFFE;  // HSI oscillator disable
     
     
     while(1){
     }
          
}



But the CPU crashes after setting up the clocks. Any ideas?

Thank you.

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