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DMA stm32f4 board problem

Question asked by haeye.hauk on Jan 18, 2016
Latest reply on Jan 18, 2016 by Clive One
Hi,
I'm using the DMA to pass data from FLASH to RAM, on the stm32f4 board.
transmission of 1500 Bytes.
I've tried to send the data as byte,half_word,word,by casting and changing configurations (appears at the code), also as memcpy.
measuring how many system_tics the transmission lasted ,showed that sending 
as half word was the best,and afterwards as memcpy.

please have a look and tell me where i'm wrong.
Thanks !!

#define BUFFER_SIZE 1600
#define DMA_IT_TCIF              DMA_IT_TCIF0
#define DMA_CHANNEL              DMA_Channel_0
#define DMA_STREAM_CLOCK         RCC_AHB1Periph_DMA2 
#define DMA_STREAM_IRQ           DMA2_Stream0_IRQn
#define DMA_IT_TCIF              DMA_IT_TCIF0
#define DMA_STREAM_IRQHANDLER    DMA2_Stream0_IRQHandler
#define DMA_STREAM               DMA2_Stream0
#define TIMEOUT_MAX              10000 /* Maximum timeout value */


const int SRC_Const_Buffer1[1600]= {DATA...};
int DST_Buffer1[1600];


int main(void)
{
SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000);
temp=DMA_Config((void *)&DST_Buffer1     ,(void *)&SRC_Const_Buffer1,0,1600);     
temp=DMA_Config((void *)&DST_Buffer1     ,(void *)&SRC_Const_Buffer1,1,800);     
temp=DMA_Config((void *)&DST_Buffer1     ,(void *)&SRC_Const_Buffer1,2,400);     
void DMA_STREAM_IRQHANDLER(void)
{
  /* Test on DMA Stream Transfer Complete interrupt */
  if(DMA_GetITStatus(DMA_STREAM, DMA_IT_TCIF))
  {
    /* Clear DMA Stream Transfer Complete interrupt pending bit */
    DMA_ClearITPendingBit(DMA_STREAM, DMA_IT_TCIF);  
    
    /* Turn LED5 on: End of Transfer */
    //STM_EVAL_LEDOn(LED5);
  }
}


int DMA_Config(void *ptrDest,void *ptrSrc,int type,int size)
{
  NVIC_InitTypeDef NVIC_InitStructure;
  DMA_InitTypeDef  DMA_InitStructure;
  __IO uint32_t    Timeout = TIMEOUT_MAX;
    
  /* Enable DMA clock */
  RCC_AHB1PeriphClockCmd(DMA_STREAM_CLOCK, ENABLE);
  /* Reset DMA Stream registers (for debug purpose) */
  DMA_DeInit(DMA_STREAM);




  // Check if the DMA Stream is disabled before enabling it.
  while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE)
  {
  }
  /* Configure DMA Stream */
  DMA_InitStructure.DMA_Channel = DMA_CHANNEL;  
      DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ptrSrc;
  DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)ptrDest;     
     




  DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToMemory;
  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Enable;
  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  DMA_InitStructure.DMA_BufferSize = (uint32_t)size;               
  switch (type)
  {
   case 0:
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;          
    break;


   case 1:
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;          
    break;


   case 2:
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;          
    break;
  }
  DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  DMA_InitStructure.DMA_Priority = DMA_Priority_High;
  DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;         
  DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
  DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;//DMA_MemoryBurst_INC8;//
  DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;//DMA_PeripheralBurst_INC8;
  DMA_Init(DMA_STREAM, &DMA_InitStructure);


  /* Enable DMA Stream Transfer Complete interrupt */
  DMA_ITConfig(DMA_STREAM, DMA_IT_TC, ENABLE);
  /* DMA Stream enable */
  DMA_Cmd(DMA_STREAM, ENABLE);
  /* Check if the DMA Stream has been effectively enabled.
     The DMA Stream Enable bit is cleared immediately by hardware if there is an 
     error in the configuration parameters and the transfer is no started (ie. when
     wrong FIFO threshold is configured ...) */
  Timeout = TIMEOUT_MAX;
  while ((DMA_GetCmdStatus(DMA_STREAM) != ENABLE) && (Timeout-- > 0))
  {
  }
   
  /* Check if a timeout condition occurred */
  if (Timeout == 0)
  {
    /* Manage the error: to simplify the code enter an infinite loop */
    while (1)
    {
               return FALSE;
    }
  }
     
  /* Clear DMA Stream Transfer Complete interrupt pending bit */
  DMA_ClearITPendingBit(DMA_STREAM, DMA_IT_TCIF7);


 /* Enable the DMA Stream IRQ Channel */
  NVIC_InitStructure.NVIC_IRQChannel = DMA_STREAM_IRQ;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);     
     
  while (DMA_GetCmdStatus(DMA_STREAM) != DISABLE);
     return TRUE;
}

void DMA_STREAM_IRQHANDLER(void)
{
  /* Test on DMA Stream Transfer Complete interrupt */
  if(DMA_GetITStatus(DMA_STREAM, DMA_IT_TCIF))
  {
    /* Clear DMA Stream Transfer Complete interrupt pending bit */
    DMA_ClearITPendingBit(DMA_STREAM, DMA_IT_TCIF);  
    
  }
}

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