Using a STM32F334K8T6 with 2 DAC channels. Each channel will go no higher than 1.5 Volts with a DAC Holding register value of 0xFFF. I expected 2.5 V because VDDA is being fed 2.5V from a reference. Where is this 1.5 Volts coming from?
- I'm using an STM32F334K8T6, an LQFP32 package
- Reference manual RM0364, 'STM32F334xx advanced ARM®-based 32-bit MCUs' has an equation of: DACoutput = VDDA * DOR / 4096.
- My DOR register shows values of 0xFFF as seen in an IAR debugger (FW is writing intended/correct values). As expected, attempting to write a larger value than 0xFFF results in the value getting truncated to 0xFFF. Smaller values result in proportionally/linearly smaller voltages e.g., 0x7FF results in 750 mV (half of 1.5 V).
- DAC configuration: for this test is simple: no DMA, no interrupts, no DAC buffer configured, 12 bit mode, right-justified
- VDDA on pin 5 (Vref+) measures 2.5 Volts and is supplied by a 2.5 V reference (LT1790-2.5). This seems to be out-of-spec because it's more than 0.4V less than VDD according to RM0364.
- VDD measures 3.3 V
- There's no VSSA (Vref-) pin or a Vbat pin on this 32 pin device.
- The DAC channels I'm using are DAC1_OUT2 on PA5 (pin 11) and DAC2_OUT1 on PA6 (pin 12).
- I checked the Reference manual RM0364 and the 'STM32F334x4 STM32F334x6
STM32F334x8' datasheet - looked for info about configuring a different Vref source for DACs or configuring a gain - didn't see anything.
- The datasheet mentioned a VREFINT (Embedded reference voltage) of 1.20 V but is used for some ADC channels rather than the DACs.
- Constraints for VDDA and VDD: RM0364 says: 'VDD must always be kept lower than or equal to VDDA' and 'It is forbidden to have VDDA < VDD - 0.4 V'.