7 Replies Latest reply on Jun 19, 2017 7:52 AM by Magnus Berg

    HASH: mixed feeding it with DMA and non-DMA writes possible?

      When I feed HASH with regular writes only or DMA only, everything is OK.
      But I need to use both methods when computing hash of a long message, and in this case I cannot manage to compute right hash value.

      Did anybody tried this?
        • Re:
          Clive One
          All the data goes through the same register, you will have to be very careful managing the ownership of the resource. Consider moving data manually in the DMA TC interrupt, or immediately prior to enabling the DMA transfer for the bulk of the data.

          Perhaps a semaphore/mutex?

          • Re:
            I reduced the case to the following very simple one:

            Computing SHA-256 of the message of 1 million 0x61 bytes (character "a"), as in FIPS186-2 example.

            If I send data by 15625 blocks of 64 bytes with DMA, and clear HASH_CR_MDMAT bit before the last block,
            I can then simply read the right digest:

            while (HASH->SR & HASH_SR_BUSY) __DSB ();
            digest[0] = (HASH_DIGEST->HR)[0];
            digest[7] = (HASH_DIGEST->HR)[7];

            Digest is
            Surprisingly, it matches with FIPS example! :-)))

            But I can also do slightly differently:
            Send all 15625 blocks of 64 bytes with DMA, without clearing HASH_CR_MDMAT.
            Then I can set HASH_STR_DCAL bit manually, can't I?

            HASH->STR = HASH_STR_DCAL;

            And I expect to have the same digest.
            But in fact I have

            What is wrong?
            • Re:
              Clive One
              Can you post a complete/concise example demonstrating the failure?

              Stating the exact part you're using might also be helpful.

              • Re:
                This is it (please find IAR project attached).
                Part is STM32F439IIH.

                • Re: HASH: mixed feeding it with DMA and non-DMA writes possible?
                  Magnus Berg

                  No reply on this one? I noticed the same thing in our STM32F439 when I tried the other day.


                  I'd like to add a similar question. I'm getting some odd length msgs in my HASH calculations, so I tried to use a byte sized memory access to fill the FIFO, and then use Word sized write to the HASH DIN register. But when I try that, I get the incorrect digest. Also, if I read the HASH DIN register after the transfer is completed, it returns 0, which is not the last 4 bytes.


                  However, if I instead use the FIFO, but use Word sized access to read it from memory, everything works as expected. I get the correct digest and I see the correct last 4 bytes in the HASH DIN register afterwards.


                  As it stands, I'll probably need to handle the byte skewing myself and write to HASH DIN manually, but I'd much rather use DMA of course.