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where is the 2nd I2C interface of STM32F103?

Question asked by lao.jian on Oct 29, 2015
Latest reply on Oct 30, 2015 by John F.
Hi all,

Recently I am working on a demon code using STM32F103.In this demon code,it defines the PE2, PE3 as the I2C interface, as below:

/* Configure I2C pins: PE2->SCL and PE3->SDA */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 ;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode =GPIO_Mode_Out_PP ; 
GPIO_Init(GPIOE, &GPIO_InitStructure);

GPIO_InitStructure.GPIO_Pin =   GPIO_Pin_3;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode =  GPIO_Mode_Out_PP ;
GPIO_Init(GPIOE, &GPIO_InitStructure);
/* ---------------------------------------------------- */

However, I checked through the reference manual and datasheet, it claims F103 has 2 I2C interface, but very few information on the 2nd I2C, such as AF of which pin are defined as I2C.In datasheet Pin information chapter, it syas:

PE2  :  TRACECK/ FSMC_A23
PE3  :  TRACED0/FSMC_A19

So, Trace function pins, CK and Data0, can be configured as I2C2? 

I checked the code of later parts, I found code as :

/* ---------------------------------------------- */

static void I2C_SendByte(uint8_t SendByte)

{

    uint8_t i=8;

    while(i--)

    {

      //SCL_L;

      //I2C_delay();

      if(SendByte&0x80)            
               SDA_H; 

      else SDA_L;  

      SendByte<<=1;

      I2C_delay();

      SCL_H;

      I2C_delay();

       SCL_L;

       I2C_delay();

    }

}


#define SCL_H         GPIOE->BSRR = GPIO_Pin_2     

#define SCL_L         GPIOE->BRR  = GPIO_Pin_2

 

#define SDA_H         GPIOE->BSRR = GPIO_Pin_3    

#define SDA_L          GPIOE->BRR  = GPIO_Pin_3
/* -------------------------------------------------------------- */

So, it seems like the code actually use GPIO of PE2, PE3 to mimic the operation of I2C, it didn't use any I2C related register. Right?


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