In my design I'm using an external 24.576 MHz oscilator as I2S clock source
Acoording to the reference manual, for 32 bit frames and MCLK output:
FS = I2SxCLK / [(32*2)*((2*I2SDIV)+ODD)*4)]
For Fs = 96 KHz, this gives I2SDIV = 0, ODD = 1.
However, in the CubeMX configuration tab this shows an error:
"With this I2S Clock (24.576 MHz), the divider value(0) is too low to obtain the desired audio frequency(96.0 KHz).
The I2S Clock must be higher than (86.016 MHz)."
I don't understand where this 86.016 MHz is coming from.
Is there something happening between the external input pin and the I2S clock generator that I'm missing? Or is this a bug in CubeMX?