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STM32F0 Curious ADC behaviour

Question asked by stokic.srdjan on Oct 11, 2015
Latest reply on Oct 27, 2015 by wolff.roger
This is relation to my previous forum post [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/STM32F030F4%20ADC%20strange%20behaviour&currentviews=31]here:

I tried to simplify the test case as much as possible and here are the results.

I'm sampling a single channel PA4 with clock set to ADC_CLOCK_SYNC_PCLK_DIV4 and sample time of ADC_SAMPLETIME_71CYCLES_5

GPIO is set in "ANALOG" mode and no pullups.

Input signal is a voltage of 0.3V.

Here is what I get on the scope when I'm measuring directly on the PA4 pin. (See attached image).

It looks like that during the sample stage, the input it pulled up to 0.7V. My input circuit is given also in the attached image.

What am I missing here?