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High Level Timer/ADC/DMA Help

Question asked by Mr. Blinky on Sep 8, 2015
Latest reply on Sep 9, 2015 by Clive One
I'm working on a sound-reactive project with the STM32F405 that samples ADC for FFT.  I'm currently using double-buffered DMA triggered by TIM3 TRGO.  Everything is working but it's very rough around the edges and I think I'm going about this wrong given my requirements.  Some of the documentation still goes over my head in this area.

The trouble comes in that the FFT isn't the primary role of the device and I can't process each buffer (128 samples) as quickly as they're currently filled.  My current workaround is to stop the timer as soon as the transfer complete interrupt fires and then enable it again once I get around to processing the buffer.  It seems that I'm still getting some samples slipping into the buffer between the time the TC interrupt fires and the time I disable the timer.  When it's re-enabled elsewhere the AC waveform doesn't match up and I end up with a lot of false low frequency information in the frequency domain.

In my mind I just want 128 samples that sit around and wait until processed.  Once processed, I just need another 128.  It's not at all important that the two buffers are contiguous samples -- only that the data they represent is close enough to visually represent the current audio input.

Can someone suggest an appropriate high level timer/adc/dma configuration to achieve what I'm looking for?

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