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STM32F103 FSMC WR signal glitch

Question asked by deshpande.saumitra on Aug 18, 2015
Latest reply on Aug 22, 2015 by deshpande.saumitra
Hello Everyone,

I am trying to interface a 7" SSD1963 LCD with STM32F103ZET6 FSMC bus. Yet to connect the LCD, but right now just checking the FSMC operation.

My Connections are,
FSMC-D0...D15 : LCD 16-BIT data bus
FSMC_OE(PD4): LCD_RD\
FSMC_WE(PD5): LCD_WR\
FSMC_NE1(PD7): LCD_CS\
FSMC_A19(PE3): LCD_RS
PE2: LCD_RST (not related directly FSMC operation in my config)
All other FSMC pins are being as GPIOs, as there is nothing else on FSMC bus.

My Code is,
/*
 * FSMC/LCD Bus RS select ADDRESSes
 * We use A19 as RS select.
 */
#define LCDBUS_CMD_ADDR             (*((volatile INT16U *)0x60000000))
#define LCDBUS_DATA_ADDR            (*((volatile INT16U *)(0x60000000 | (1<<(19+1)))))
 
/**
  * @brief  vInit_FSMC_GPIO()
  *        
  * @param  None
  * @retval None
  */
void vInit_FSMC_GPIO( void )
{
    GPIO_InitTypeDef                GPIO_InitStructure;
 
    RCC_APB2PeriphClockCmd( FSMC_PORT_CLOCK, ENABLE );
 
    /*-- GPIO Configuration ------------------------------------------------------*/
    GPIO_InitStructure.GPIO_Mode    = GPIO_Mode_AF_PP;
    GPIO_InitStructure.GPIO_Speed   = GPIO_Speed_50MHz;
     
    GPIO_InitStructure.GPIO_Pin     = FSMC_D2 | FSMC_D3 | FSMC_D13 | FSMC_D14 | FSMC_D15 | FSMC_D0 | FSMC_D1;  // GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15;
    GPIO_Init(GPIOD, &GPIO_InitStructure);
 
    GPIO_InitStructure.GPIO_Pin     = FSMC_D4 | FSMC_D5 | FSMC_D6 | FSMC_D7 | FSMC_D8 | FSMC_D9 | FSMC_D10 | FSMC_D11 | FSMC_D12; //GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
    GPIO_Init(GPIOE, &GPIO_InitStructure);
     
    /* No address lines are used except A19 */
 
    /* RS */
    GPIO_InitStructure.GPIO_Pin     = TFT_RS;  //GPIO_Pin_3
    GPIO_Init(GPIOE, &GPIO_InitStructure);   
 
    /* NOE and NWE configuration */
    GPIO_InitStructure.GPIO_Pin     = FSMC_OE  | FSMC_WE; //GPIO_Pin_4 |GPIO_Pin_5;
    GPIO_Init(GPIOD, &GPIO_InitStructure);
 
    /* NE1 configuration */
    GPIO_InitStructure.GPIO_Pin     = FSMC_NE1; // GPIO_Pin_7
    GPIO_Init(GPIOD, &GPIO_InitStructure);
 }
/**
  * @brief  vInit_FSMC_Slow()
  *
  * @param  none
  * @retval none
  *
  */
void vInit_FSMC_Slow( void )
{
    FSMC_NORSRAMInitTypeDef         FSMC_NORSRAMInitStructure;
    FSMC_NORSRAMTimingInitTypeDef   FSMC_TimingInitStructure;

    /* Enable FSMC Clock */
    RCC_AHBPeriphClockCmd( RCC_AHBPeriph_FSMC, ENABLE );

      /* Using max timing parameters just for checking */

    FSMC_TimingInitStructure.FSMC_AddressSetupTime      = 0x0F;
    FSMC_TimingInitStructure.FSMC_AddressHoldTime       = 0x0F;
    FSMC_TimingInitStructure.FSMC_DataSetupTime         = 0xFF;
    FSMC_TimingInitStructure.FSMC_BusTurnAroundDuration = 0;
    FSMC_TimingInitStructure.FSMC_CLKDivision           = 1;
    FSMC_TimingInitStructure.FSMC_DataLatency           = 0;
    FSMC_TimingInitStructure.FSMC_AccessMode            = FSMC_AccessMode_A;
 
    FSMC_NORSRAMInitStructure.FSMC_Bank                 = FSMC_Bank1_NORSRAM1;
    FSMC_NORSRAMInitStructure.FSMC_DataAddressMux       = FSMC_DataAddressMux_Disable;
    FSMC_NORSRAMInitStructure.FSMC_MemoryType           = FSMC_MemoryType_SRAM;
    FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth      = FSMC_MemoryDataWidth_16b;
    FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode      = FSMC_BurstAccessMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait     = FSMC_AsynchronousWait_Disable;   
    FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity   = FSMC_WaitSignalPolarity_Low;
    FSMC_NORSRAMInitStructure.FSMC_WrapMode             = FSMC_WrapMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive     = FSMC_WaitSignalActive_BeforeWaitState;
    FSMC_NORSRAMInitStructure.FSMC_WriteOperation       = FSMC_WriteOperation_Enable;
    FSMC_NORSRAMInitStructure.FSMC_WaitSignal           = FSMC_WaitSignal_Disable;
    FSMC_NORSRAMInitStructure.FSMC_ExtendedMode         = FSMC_ExtendedMode_Disable;
    FSMC_NORSRAMInitStructure.FSMC_WriteBurst           = FSMC_WriteBurst_Disable;
  
    FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct= &FSMC_TimingInitStructure;
    FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct    = &FSMC_TimingInitStructure;
 
    FSMC_NORSRAMInit( &FSMC_NORSRAMInitStructure );
 
    FSMC_NORSRAMCmd( FSMC_Bank1_NORSRAM1, ENABLE );
}
 
/**
  * @brief  vFSMC_WriteCommand)
  *
  * @param  INT16U  cmd
  * @retval none
  *
  */
void vFSMC_WriteCommand( INT16U cmd )
{
    LCDBUS_CMD_ADDR = cmd;
}
 
/**
  * @brief  vFSMC_WriteData()
  *
  * @param  INT16U  data
  * @retval none
  *
  */
void vFSMC_WriteData( INT16U data )
{
    LCDBUS_DATA_ADDR = data;
}
 
/**
  * @brief  uiFSMC_ReadData()
  *
  * @param  none
  * @retval INT16U
  *
  */
INT16U uiFSMC_ReadData( void )
{
    return LCDBUS_DATA_ADDR;
}

To test the FSMC opeartion, I am just sending the Read/Write command in an infinite loop and watching the FSMC bus lines on scope.
int main( void )
{      
    vInit_SysTimer();                           // 10mS heart-beat timer based on SysTimer
     
    vInit_FSMC_GPIO();
    vInit_FSMC_Slow();
     
    while( TRUE ) {
         vSysTimer_Delay( SYS_TICKS_1S/4 );   // 250mS delay to further slow things down
         
        vFSMC_WriteCommand( 0xaaaa );       
        //uiFSMC_ReadData();
        //vFSMC_WriteData( 0x5555 );
    }
}

All the bus lines look fine & are as expected except WR line during write operation. During Write operation WR\ gets asserted twice. Something like,
___    _     ____________
     |    | |    |
     |__| |__|

Expected WR\ assertion period is entire WR period without glitch.
The glitch appears exactly centered on WR\ assertion period & its width changes as per FSMC timing I program into FSMC initialization.

There is no glitch on either on WR\ or RD\ lines during Read operation.
Also enabling FSMC Extended mode & changing to Access_Mode_C or D, WR\ glitch appears exactly as MODE_A. Using MODE_B, glitch amplitude reduces, but its still very much there.

PCB too looks fine with no shorts or anything else. In fact I can use WR\(PD5) line as GPIO output perfectly without any issues.

Obviously glitch shouldn't be there. What may be the problem or may be I am setting up the FSMC incorrectly.

Any info will be very helpful & thanks in advance.

Sam

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