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STM32F407 DMA stream x FIFO control register (DMA_SxFCR) default value

Question asked by Kyb.Ivan on Jul 31, 2015
Latest reply on Aug 3, 2015 by Amel N
As written in Ref.Man.
                                   
 DMA stream x FIFO control register (DMA_SxFCR) (x = 0..7)
            Address offset: 0x24 + 0x24 × stream number
            Reset value: 0x0000 0021

           
It is true only for DMA1 streams, but for DMA2 reset value is 0x0.

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