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STM32F407VET PLL problem

Question asked by ahmed.kareem on Jul 7, 2015
Latest reply on Jul 7, 2015 by Clive One
I used STM32 cube for the PLL configuration 

// Enable HSE Oscillator and activate PLL with HSE as source
 
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 
 
  // This assumes the HSE_VALUE is a multiple of 1MHz. If this is not
  // your case, you have to recompute these PLL constants.
 
  RCC_OscInitStruct.PLL.PLLM = (HSE_VALUE/1000000u);
  RCC_OscInitStruct.PLL.PLLN = 336;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = 7;
  HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
 
 
  // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
  // clocks dividers
 
  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
      | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);

And used this function to get the system clock

Sys_Freq=HAL_RCC_GetSysClockFreq();

Sys_Freq after calling this function = 168, so the initialization is correct


used this function to rout system clock on MCO1,,, the GPIO also made with STM32Cube

HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_PLLCLK, RCC_MCODIV_2);



the logic analyser shows only 9 Mhz on MCO1 where it should be 84Mhz.. So my Question is, WHAT I AM MISSING ??????


I would very much appreciate any help or suggestion, its been 3 days and didnt have any luck solving this problem :(

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