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Weird/Not fully understood behaviour of HRTIM

Question asked by eromosele.ambrose on Jul 7, 2015
Latest reply on Jul 21, 2015 by eromosele.ambrose
Iam having big problems with the high resolution timer on the STM32f334microcontroller.
I am using a period of 0xD3C2, this would normally mean that writting 0xD3C2 to a compare register is full duty cycle (or zero  - actually 0x60, as I am running at 4GHz - depending on the polarity). - (I use compare registers one and two for two separate circuits).
And that the duty cycle will reduce progressively as you reduce the number. But this is not the case. what I have observed is that
0xD3C2 to a compare register is full duty cycle, but the behaviour of the hardware is unpredictable between a value of 0xD3C2 and 0xD3A2(ish).

Also, it seems that the act of writing to the compare register creates unusual spikes in the controlled circuits. I do know that the reference manual
specifies minimum and maximum values for compare registers depending on the CKPSC[2:0] values. I guess that these values are not
necessarily fixed, but depends on the actual period of PWM.
I am not sure exactly why it behaves odd, but could any one please enlighten me on this.
(I am running the PWM at about 85kHz)
Thanks.

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