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RCC_CFGR2's bit 0 donot change when RCC_CFGR's bit 17 changed

Question asked by ll.hgyxb on May 22, 2015
Latest reply on Jun 26, 2015 by Amel N
Hi all, 

From the STM32F100xx Reference manual, the RCC_CFGR2's bit 0 is same as RCC_CFGR's bit 17.
And at our company's one product(which use STM32F100ZCT6) it work right. when CFGR change, the CFGR2 changed too.
But at another product(which use STM32F100VCT6) it wok wrong.
RCC_CFGR2's bit 0 donot change when RCC_CFGR's bit 17 changed.

The two product all use external 8Mhz crystal oscillator and set sys clock as 24Mhz.

The code as below:
function: SetSysClockTo24
#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
    /*  PLL configuration:  = (HSE / 2) * 6 = 24 MHz */
    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6);
#else 

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