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Is the MOSI pin in high impedance during a SPI read operation?

Question asked by petrovic.darko on May 4, 2015
Latest reply on May 4, 2015 by petrovic.darko
Hello,

My question is very simple. I'm wandering whether or not we can configure the MOSI/MISO pin as normal GPIO and set them in high impedance while a SPI communication is ongoing (just for clock generation for example). 

For example, if the MOSI and MISO pin are connected together and the master (the MCU) is performing a read SPI operation on a slave, could we configure the MOSI pin in high impedance? Or maybe it is already in high impedance at this time and it would be no problem?

Tanks for your help. 

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