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STM32F417IGT6 FSMC A25 HardFault

Question asked by f-stop on Apr 12, 2015
Latest reply on Apr 12, 2015 by f-stop
I have an ILI9325 TFT LCD connected to an F417IGT6 via FSMC Bank 1, Region 1, using 16-bits.

The ILI9325 has an 8080-style interface, and FSMC A25 has been selected to drive register select as per AN2790 Figure 3 for 176-pin devices.

I calculated A25 offset to be 0x2000000 from Bank 1 Region 1 start address (which according to RM0090 is at 0x60000000), giving 0x62000000.

At this address I am not seeing anything on the logic analyser. A25 is PG14 on the 417IGT6 and if set to output push pull, can be driven successfully, proven by inspection with the logic analyser again, ruling out a hardware issue.

When I configure the FSMC with A16 or A19, all is fine as well and the LCD works perfectly, proving the the remainder of the FSMC setup is correct.

Clive and Andy Brown's posts elsewhere on this forum, along with a broader search on Google and inspection of the working addresses for A16 and A19, lead me to suspect that the A25 address might actually be 0x64000000, but when writing to this address the MCU hardfaults.

Looking at RM0090, 0x64000000 looks to be the start of region 2 of Bank 1.

My questions is whether my calculated offset of 0x2000000 is even correct at all and if not, a bit of insight on the hardfault from a more experienced developer.

Below are some of the SCB register contents at exception:

HFSR: 0x40000000

CFSR: 0x400

MMFAR: 0xE000ED34

BFAR: 0xE000ED38

DFSR: 0xA


Thanks







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