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Diffrence between enabling Interrupt in NVIC and enabling Interrupt for Peripherie (e.g Timer)

Question asked by kt.en on Mar 25, 2015
Latest reply on Mar 25, 2015 by kt.en

I try to get a deeper understanding of the STM32F4 microcontrollers but there is one thing I do not really unterstand and i could´t find an answer in the literature im reading.

What ist the specific difference in enabling an Interrupt for the NVIC and for the Peripherie? I know, both has to be done in order to enable an Interupt Service Rountine.

But what exactly triggers the Interrupt? For my understanding so far, the peripherie starts an interupt request. No matter if the interrupt at the peripherie was enabled or not, an Interupt Flag gets set. This Interupt Flag triggers the NVIC to start the Interrupt (vector fetching and stacking...) as long as the Interupt Request Channel was activated in the NVIC. Thats why we would end in an Interrupt Request Handler loop as long as we do not clear the Interrupt Flag (pending bit).
But why doesn´t it start, if the interrupt is not enabled at the peripherie, though the Interupt Flag is set no matter what?

With best regards,