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DMA FIFO level

Question asked by nosikovsky.aleksandr on Mar 9, 2015
Latest reply on Mar 10, 2015 by childress.steve
Please, confirm my assumption: it is typing error in RM0090? Register DMA_SxFCR STM32F4xx
       
  • Bits 1:0 FTH[1:0]: FIFO threshold selection
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  • These bits are set and cleared by software.
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  • 00: 1/4 full FIFO
  •    
  • 01: 1/2 full FIFO
  •    
  • 10: 3/4 full FIFO
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  • 11: full FIFO
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  • These bits are not used in the direct mode when the DMIS value is zero.
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  • These bits are protected and can be written only if EN is ‘1’
Must be EN = 0?P.S. On this forum, it is impossible to format the message. This is the worst that can be found. Developer Wake up!

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