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Question asked by ilyin.evgeny.001 on Feb 25, 2015
Latest reply on Feb 25, 2015 by Clive One
Hello! Sorry for my English.
I try to understand the controller LTDC STM2F429.
1) Maximum resolution TFT 1024x768. However, the registers of the total width and height of the display are 12 bit and 11 bits, respectively. This 4096x2048 pixels, respectively. Why so? Why so much? I have not seen displays 1024x768, where total width and height are very large.
2) Why some registers for the width and height of the display? Why accumulate several registers contain values? Why accumulate? Why not: separate registers for HSYNC, HBP, Active width, HFP?The same goes for the registers length and step color buffer - judging by of reference manualthe length of the line is a step + 3. Why it could not be done internally? Or is it some feature? Why so?
3) Why in register of number of lines (LTDC_LxCFBLNR) number of 11 bits (a maximum of 2048 lines of a frame). But you can connect a maximum display 1024x768, i.e. 768 lines. Why 11 bits instead of 10? What is the reason?

It is interesting to me personally. I wonder why it is so, why is the engineering solution. And, to be aware of possible tricks software graphics acceleration (except DMA2D).