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STM32F4 UART IRQ issue

Question asked by h.vek on Jan 22, 2015
Latest reply on Jan 23, 2015 by h.vek
Hi,

I am trying to receive RF packet using USART1 IRQ, using below code. But packets are missing in the receive end.
My point here is sometimes i will receive packets and the received packet is completely valid, i mean all received bytes are perfect.
But I am expecting interrupt IRQ to be called many times. but thats not happening here.
Can any one please suggest me is my IRQ function is valid ?
 


01.void USART1_IRQHandler(void)
02.{
03.    char c;
04.    uint8_t rByte=0,lsb=0,msb=0,rCnt=0;
05.  
06.    c=USART_ReceiveData(USART1);
07.          
08.        switch(rByte)
09.         {
10.         case 0:
11.           if(c==PACKET_DELIMETER)
12.         {
13.            received_String[rCnt++]=c;  //first byte copied to array
14.            rByte=1;
15.          }
16.              break;
17.                  
18.            case 1:
19.                   msb=c;    //Second byte copied to array
20.               received_String[rCnt++]=msb;
21.               rByte=2;
22.                  break;
23.         
24.              case 2:
25.                  lsb=c;  //3rd byte copied to array
26.               received_String[rCnt++]=lsb;
27.               rByte=3;
28.                  break;      
29.     
30.             case 3:
31.              if(c==ZB_API_RECEIVEPACKET)
32.              {
33.                received_String[rCnt]=c;
34.                for(rCnt=4;rCnt<lsb+1;rCnt++)
35.                 {
36.                    received_String[rCnt]=c;   // whole packet will be received at this point
37.                 }
38.                rByte=4;
39.             }
40.                break;
41.                   
42.                 case 4:
43.                 if(received_String[15]==g_ch_indx && received_String[16]==g_frame_Id)
44.                    {                         
45.                        g_bOK=1;
46.                        g_nei_id = received_String[17];
47.                   }
48.                 break;
49.                      
50.               default :
51.                 break;
52.            }
53.    }

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