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Single ADC, timer-triggered, won't fire DMA interrupts

Question asked by Charles Miller on Jan 20, 2015
Latest reply on Jan 21, 2015 by Charles Miller
Using the STM32F207, I am trying to get the DMA2 Stream 4 interrupt to fire.  Can someone take a look at the setup below, and tell me if I have a problem with the setup?  (I'm sure Clive will only have to take a few seconds!)

I want TIM5, CC1 to be the trigger source.  I purposely slowed down the timer to do debugging.  I'm not sure if the plumbing is correct to get this timer expiry to be the trigger source to the ADC.  I added a TIM5 interrupt just to make sure the CC1 is happening, and it is. This code simply does not vector to DMA2_Stream4_IRQHandler().

I do want to see xfer complete and half-transfer interrupts.

Notes: This is from a C++ file; I hope I didn't miss anything trying to "C"-ify it. 

Thanks in advance.

{
    {
        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
        RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
        RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM5, ENABLE);
        RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
    }
 
    {
        GPIO_InitTypeDef GPIO_InitStructure;
 
        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
        GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
        GPIO_Init(GPIOA, &GPIO_InitStructure);
 
        GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
        GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
        GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
        GPIO_Init(GPIOA, &GPIO_InitStructure);
    }
 
    {
        NVIC_InitTypeDef NVIC_InitStructure;
 
        NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream4_IRQn;
        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 11;
        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
        NVIC_Init(&NVIC_InitStructure);
 
        NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 11;
        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
        NVIC_Init(&NVIC_InitStructure);
    }
 
    {
        DMA_InitTypeDef DMA_InitStructure;
 
        DMA_DeInit(DMA2_Stream4);
 
        DMA_InitStructure.DMA_Channel = DMA_Channel_0;
        DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)(&(dbg_buffer[0]));
        DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(&(ADC1->DR));
        DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
        DMA_InitStructure.DMA_BufferSize = 8;
        DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
        DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
        DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
        DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
        DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
        DMA_InitStructure.DMA_Priority = DMA_Priority_High;
        DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
        DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
        DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
        DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
        DMA_Init(DMA2_Stream4, &DMA_InitStructure);
 
        DMA_ITConfig(DMA2_Stream4, DMA_IT_TC | DMA_IT_HT, ENABLE);
 
        DMA_Cmd(DMA2_Stream4, ENABLE);
    }
 
    {
        TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
        TIM_OCInitTypeDef oc_config;
 
        TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
        TIM_TimeBaseStructure.TIM_Period = 2000 - 1;
        TIM_TimeBaseStructure.TIM_Prescaler = 0x752f; // pclk is 60MHz; timer clk ~= 2000Hz
        TIM_TimeBaseStructure.TIM_ClockDivision = 0;
        TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
        TIM_TimeBaseInit(TIM5, &TIM_TimeBaseStructure);
        TIM_ARRPreloadConfig(TIM5, ENABLE);
 
        TIM_ITConfig(TIM5, TIM_IT_CC1, ENABLE);
 
        TIM_SelectOutputTrigger(TIM5, TIM_TRGOSource_OC1Ref);
 
        TIM_OCStructInit(&oc_config);
 
        oc_config.TIM_Pulse = 50000; // doesn't matter
        oc_config.TIM_OCMode = TIM_OCMode_PWM1;
        oc_config.TIM_OutputState = TIM_OutputState_Enable;
        oc_config.TIM_OCPolarity = TIM_OCPolarity_High;
 
        ::TIM_OC1Init(TIM5, &oc_config);
        ::TIM_OC1PreloadConfig(TIM5, TIM_OCPreload_Enable);
 
        TIM_Cmd(TIM5, ENABLE);
    }
 
    {
        ADC_CommonInitTypeDef ADC_CommonInitStructure;
        ADC_InitTypeDef ADC_InitStructure;
 
        ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
        ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
        ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
        ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
        ADC_CommonInit(&ADC_CommonInitStructure);
 
        ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
        ADC_InitStructure.ADC_ScanConvMode = ENABLE;
        ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
        ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
        ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T5_CC1;
        ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
        ADC_InitStructure.ADC_NbrOfConversion = 2;
        ADC_Init(ADC1, &ADC_InitStructure);
 
        ADC_RegularChannelConfig(ADC1, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
        ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 2, ADC_SampleTime_15Cycles);
 
        ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
        ADC_DMACmd(ADC1, ENABLE);
        ADC_Cmd(ADC1, ENABLE);
        ADC_SoftwareStartConv(ADC1);
    }
}

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