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AHBxENR and AHBxLPENR

Question asked by Uwe Bonnes on Jan 6, 2015
Hello,

how is the relation between AHBxENR and AHBxLPENR? If some clock is disabled in run-mode, it is automatic also disabled in sleep mode despite the related LPENR bit _not_ reset?. Or is it needed explicit to reset the corresponding bit in the LPENR register to disable in sleep mode even so the corresponding bit is _not_ set  in run-mode?

I didn't find anything about this in several referenc manuals.

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