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frecuency limit

Question asked by valencia.juan on Dec 22, 2014
Latest reply on Dec 22, 2014 by valencia.juan
i'm triying to set a timer with a period of 1 us for a input capture application but i get a maximun of 600 khz (more o less). A led toggling at 300 khz.

i can reach accurately any value under 500 khz (led 250khz)  but over that speed it starts behaving badly.

i've tried with timers 2 and 4 and the response is the same. 

I don't think my oscilloscope it's the problem but i'm using a HANTEK 6028be (48 Msa/s)

GPIOS are set to HIGH SPEED and all clocks to its maximun.

I didn't experienced this problem with the old std perih library, just now i'm working with the hal library. any idea?


/* Enable Power Control clock */
  /* The voltage scaling allows optimizing the power consumption when the device is
     clocked below the maximum system frequency, to update the voltage scaling value
     regarding system frequency refer to product datasheet.  */
  /* Enable HSE Oscillator and activate PLL with HSE as source */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLM = 8;
  RCC_OscInitStruct.PLL.PLLN = 360;
  RCC_OscInitStruct.PLL.PLLQ = 7;
  /* Activate the Over-Drive mode */
  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
     clocks dividers */
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 
  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);