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STM32 ADC: Multiple channels with different sampling rates

Question asked by Phataas on Oct 23, 2014
Latest reply on Oct 24, 2014 by Phataas

I am trying to figure out how the STM32 multiple channels ADC conversion works (regular group). Lets say I want to convert on two channels, channel 1 and channel 2, on ADC1 and the sampling rates are 1 Hz and 10 Hz respectively (not actual numbers). I enable the setting to get an ADC EOC interrupt on each conversion (EOCS bit), which mean for each converted value the ISR is triggered and run.

I assume for the given sampling rates that the ISR will be triggered once every second for channel 1 and ten times every second for channel 2.

In the ISR, do I have to keep a track on which channel triggered the ISR or is there some register i can check that contains this information? How is this usually done?

If I were to use the DMA, how would the data be arranged? Would it be an array where every 11th value would be the channel 1 data and the rest channel 2 data?