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STM32F303xC Starting one timer with another timer UE

Question asked by Vycas.Arturas.001 on Oct 21, 2014
Hello everyone, i am trying to start another timer with another timer update event. I tried to follow RM(see picture attached) and it seems that i did everything as it states, but maybe i understand something wrong, or i did something wrong. As i understand, Timer3 should be running and CNT register is incremented. When it reaches ARR value of TIM3, update event should be generated to trigger TIM2 and CEN bit should be 1 in TIM2->CR1. However TIM2 never starts. I'll be gratefull for any suggestions and comments. Code which i written for this is here;

#include "stm32f30x.h"


TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;


int i;


void TIM3_IRQHandler(void)
{
  GPIOE->ODR ^= GPIO_Pin_10; 
  TIM_ClearITPendingBit(TIM3, TIM_IT_Update);// Clear interrupt pending bit, so it can go to interrupt again
}


int main(void)
{
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE); // GPIOE clock
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE);
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
  
  // Port E pin 10 (blue LED) configuration
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_Init(GPIOE, &GPIO_InitStructure);
  
 //  NVIC structure
  NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);
  
  //Timer3 settings
  TIM_TimeBaseInitStructure.TIM_Period = 10000; // 0.1ms*10000 = 1s. Means counter will count to 10000 exactly 1s.
  TIM_TimeBaseInitStructure.TIM_Prescaler = 7200-1; // Divide clock freq. 72Mhz from 7200-1. so it gives ~ 0.1ms ticks.
  TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1; // Don't divide Timer clock frequency
  TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up; // count from 0 to ARR value
  TIM_TimeBaseInit(TIM3, &TIM_TimeBaseInitStructure );
  
  /* Configure Timer3 as a Master timner*/
  TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Update); // Timer 3 update event is selected as trigger output
  TIM_SelectMasterSlaveMode(TIM3, TIM_MasterSlaveMode_Enable); // synchronization between the current timer and its slaves (through TRGO) is enabled
  
  
  //Timer2 settings
  TIM_TimeBaseInitStructure.TIM_Period = 30000; // 0.1ms*30000 = 3s. Means counter will count to 30000 exactly 3s.
  TIM_TimeBaseInitStructure.TIM_Prescaler = 7200-1; // Divide clock freq. 72Mhz from 7200-1. so it gives ~ 0.1ms ticks.
  TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1; // Don't divide Timer clock frequency
  TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up; // count from 0 to ARR value
  TIM_TimeBaseInit(TIM2, &TIM_TimeBaseInitStructure );


 TIM_SelectInputTrigger(TIM2, TIM_TS_ITR0); // Timer 2 trigger source is TRGO0
 TIM_SelectSlaveMode(TIM2, TIM_SlaveMode_Trigger); // The counter starts at a rising edge of the trigger TRGI
  
  //  TIM_ClearFlag(TIM3, TIM_FLAG_Update); // Clear Timer3 UIF flag
  TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE); // Enable Timer3 interrupts
  TIM_Cmd(TIM3, ENABLE);  // Enable TIM3 counter
   
  while(1);
}

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