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DMA Hangs When Sys Clock Lowered

Question asked by Joshua on Sep 11, 2014
I use three DMA channels to transfer data via SPIs on a STM32F427VG. I normally run SYSCLK at 168MHz, with SPIs prescaled down to 21MHz, and everything works fine. I'm working on tracking down a noise issue, so I am trying to reduce clock speeds. I used the Clock Configurator tool to generate a new system_stm32f4xx.c file to run at 96MHz (SPIs dropped to 12MHz). 

However, this seems to cause one of the DMA channels to hang; I'm having trouble pinpointing how long but it seems to take multiple mS after transmitting for one of the DMA streams to become available again.

Any thoughts?