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SDIO Minimum SYSCLK question

Question asked by forrestjon on Jul 9, 2014
Latest reply on Nov 8, 2015 by Clive One
Hello,

I have a working SDIO FATFS project on an STM32F4 Discovery PCB.
This project works nicely at system clock frequencies down to 24 MHz.

When I try running the project at system clocks of 16 MHz and 8MHz, the SDIO Clock will not even turn on.
I forced the PLL output on in the system_stm32f4xx.c file and the SDIO clock comes on.
This results in either a hard fault handler or file IO errors from the f_write() and f_read() operations.

We are trying to run our circuit at as low a speed as possible in order to save power and still have reliable SDIO functionality.

Is there a minimum SYSCLK freq spec that I should be aware of?

I am aware of the requirement for the 8/3 SDIO_CK/PCLK2 max frequency ratio.

For the 8MHz SYSCLK design I am using the 8MHz HSE crystal, 8MHz SYSCLK, 12.8MHz SDIO CLK and 8MHz PCLK2.

The summary information from my system_stm32f4xx.c file is below:
 *=============================================================================
  *        Supported STM32F40xx/41xx/427x/437x devices
  *-----------------------------------------------------------------------------
  *        System Clock source                    | HSE
  *-----------------------------------------------------------------------------
  *        SYSCLK(Hz)                             | 8000000
  *-----------------------------------------------------------------------------
  *        HCLK(Hz)                               | 8000000
  *-----------------------------------------------------------------------------
  *        AHB Prescaler                          | 1
  *-----------------------------------------------------------------------------
  *        APB1 Prescaler                         | 1
  *-----------------------------------------------------------------------------
  *        APB2 Prescaler                         | 1
  *-----------------------------------------------------------------------------
  *        HSE Frequency(Hz)                      | 8000000
  *-----------------------------------------------------------------------------
  *        PLL_M                                  | 8
  *-----------------------------------------------------------------------------
  *        PLL_N                                  | 192
  *-----------------------------------------------------------------------------
  *        PLL_P                                  | 8
  *-----------------------------------------------------------------------------
  *        PLL_Q                                  | 15
  *-----------------------------------------------------------------------------
  *        PLLI2S_N                               | NA
  *-----------------------------------------------------------------------------
  *        PLLI2S_R                               | NA
  *-----------------------------------------------------------------------------
  *        I2S input clock                        | NA
  *-----------------------------------------------------------------------------
  *        VDD(V)                                 | 3.3
  *-----------------------------------------------------------------------------
  *        Main regulator output voltage          | Scale2 mode
  *-----------------------------------------------------------------------------
  *        Flash Latency(WS)                      | 0
  *-----------------------------------------------------------------------------
  *        Prefetch Buffer                        | ON
  *-----------------------------------------------------------------------------
  *        Instruction cache                      | ON
  *-----------------------------------------------------------------------------
  *        Data cache                             | ON
  *----------------------------------------------------------------------------- 

Thank You,

Forrest

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