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STM32 ADC basics

Question asked by gulin.marko on Jul 9, 2014
Latest reply on Jul 10, 2014 by Jack Peacock
Dear all,

I'm new in embedded systems, and I have a few simple questions regarding ADC on STM32F4xx.

1. In the processor block diagram, I can see that ADCs (there are three of them) are connected to APB2 that has operating clock frequency of 84 MHz. Is this 84 MHz clock frequency exactly 84 MHz, or this clock frequency can deviate? If it deviates, is it possible for it to deviate during the processor runtime, or is it just due to the material imperfection - something like inherent deviation that varies from a processor unit to processor unit? Or the number of peripheral devices powered on also affects APB2 clock frequency?

2. I can see in the processor datasheet in ADC characteristics table that maximum ADC clock frequency is 36 MHz, with typical clock frequency of 30 MHz. However, in peripheral library I have available only Div2, 4, 6, and 8 options, which means that if I choose Div2 the ADC clock frequency will be 42 MHz, and if I choose Div4 the ADC clock frequency will be 21 MHz. How can I set this 30 MHz clock frequency that is stated as typical value? I suppose that Div4 option will not do, but if I choose Div2 option (42 MHz) what will happen then? Will something like this mess with ADC causing it not to perform well? Also, if I set 42 MHz, ADC will try to operate at 36 MHz, right?

3. In Dual regular ADC mode, two ADCs are scanning their corresponding sequence of inputs (channels), but they are synchronized. E.g. current and voltage measurements are connected to ADC1_CH0 and ADC2_CH4, and this conversion mode will ensure that these channels (single or multiple of them) are converted at the same time instance?

4. Considering sample time and conversion terms - during sample-time-cycles the ADC is "collecting" the signal, and during the conversion-cycles the ADC is actually transforming voltage level to bits? Sample time can be configured (less sample time means higher consumption, this is the only difference?), and conversion time (in cycles) depends on the ADC resolution (less bits, faster the conversion is)?

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