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STM32F4 - trigger digital output based on ADC - minimizing delays

Question asked by Gerber on Jul 8, 2014
Latest reply on Jul 8, 2014 by Clive One


I’m trying to minimize control loop delays. Based on a certain analog value (adjustable threshold) a digital output is triggered. Reading ADC values is done by using DMA, digital outputs are driven without DMA.

Results measured by scoop: minimum delay ~300 μs, variation ~90 μs (min 300 μs, max 390 μs)

Does anybody have some tips/tricks/best practices minimizing ADC-DO control loop delays?