We are using the controller STM32F427ZIT6 from ST in our design. As we are using the NRST pin for processor reset in our older design(Atmel AT91FR40162S-CJ) we are trying to Bypass the Internal Reset circuitry of ST.
In ST LQFP144 Package there is no options to bypass it. It is having following 2 Options
- It has to be connected VDD if we are using internal reset controller.
- It has to be connected to external voltage supervisor circuit.
Our design snapshot is embedded in the question
The question we have is
- Our design concept, The NRST will be released after the PDR_ON is released from the reset. So it is like bypassing the PDR_ON by using NRST.
- If we connect(PDR_ON) it to ground or week pull down or float, I think the Processor will not Power up. Is it correct?
- Is there any possibility or registers to bypass or eliminate the PDR_ON signal.
- If I use my 2.9V reset signal from external voltage detector(Refer attached sch) as PDR_On. Is it will work.
Is there any IBIS model, Recommended Layout diagram for STM32F427ZIT6.