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STM32F407 errata DM00037591

Question asked by fristedt.jan on Apr 29, 2014
Latest reply on Apr 29, 2014 by fristedt.jan
Hi all,

I have read section 2.1.10 in the errata over and over without really getting the message.

Do the fine people at ST mean that DMA2 can only serve one task at the time, ie I can not have concurrent DMA transfers despite all fancy hardware, multiple buses, arbiter etc, described in the reference manual? Do they mean that I have to use the CPU to shuffle data if I have more than one stream? I hope I'm wrong and have misunderstood the situation completely.

Any thoughts on this?