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SPI without NSS/CS

Question asked by nilsson.magnus.001 on Apr 3, 2014
I'm implementing SPI half duplex 16bit MODE0 single slave on an STM Discovery.
However I can't get the communication reliable without also using NSS.
Without NSS, most of the data sent by the master is read right-shifted one bit, with one high bit shifted in: e.g. 0xA5F0 is becomes 0xD2F8.
Though sometimes, rarely, the data comes across correct.

Since the real master is under development, I use C232HM-DDHSL-0, http://www.ftdichip.com/Products/Cables/USBMPSSE.htm as master for testing.

The real master has no CS, so this has me concerned.
I've tried changing MODEs (simply wrong phase was my first thought, but no), clock frequencies etc., but to no avail.
The communcation is otherwise very stable, apart from the data shifting.

This bit in the reference manual is also not reassuring:
"In a single slave system it is not necessary to control the slave with NSS, but it is often better to provide the pulse here too, to synchronize the slave with the beginning of each data sequence."
So you don't need NSS. But - maybe you do?

My next step will of course be to check with a scope - or keep using CS for now, and hope that it's an issue with the test master FTDI cable.
But I thought I'd check here in case anyone has experienced a similar problem - or indeed if someone has implemented SPI without NSS and without these issues.

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