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STM32F42xx errata - FMC Corruption ... really?

Question asked by John F. on Mar 27, 2014
Latest reply on Mar 27, 2014 by John F.
The STM32F42xx and STM32F43xx Errata DocID023833 Rev 6 Para 2.8.4 says, there may be Corruption of data read from the FMC under some circumstances.

"When the FMC is used as stack, heap or variable data, an interrupt occurring during a CPU
read access to the FMC may results in read data corruption or hard fault exception. This
problem does not occur when read accesses are performed by another master or when
FMC accesses are done when the interrupts are disabled."

The workarounds are to use only DMA to read access the FMC or only read it when interrupts are disabled.

Is this right? A real-time microcontroller must have all interrupts disabled in order to safely read memory on the FMC? Have I misunderstood?

I was planning to use an STM32F429 with SDRAM. Now I'm worried. Anybody else noticed this?