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STM32F10x interrupt issues

Question asked by dmitriev.ivan.001 on Mar 14, 2014
Latest reply on Mar 18, 2014 by dmitriev.ivan.001

I'm using an STMF103RCT MCU in IAR 6.5 for ARM. I'm working from a public institution with a questionable software sourcing policy - don't ask me to install Eclipse/OpenOCD/Zadig - I've spent 3 weeks installing it on my ..ahem.. windows and it failed every single time.

I have created a 4x4 interrupt table, for various functions I have to launch.
So far I am experiencing random PC jumps and Hard faults for every function call I have within
an interrupt handler.
I have several questions:
- I am assuming that my MCU has 48kBytes RAM and 256 kBytes flash, do I assume correctly when I think that the mapped space in the icf must exceed the physical space, and I've created the following .icf:
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__   = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__     = 0x0803FFFF;
define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__     = 0x2001FFFF;
define symbol __ICFEDIT_size_cstack__   = 0x4000;
define symbol __ICFEDIT_size_heap__     = 0x1000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
initialize by copy { readwrite };
do not initialize  { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };

I'm using a semihosted debug mode, am I correct to assume that it takes some memory and it might influence execution?
Where are the statically-initialized arrays placed for STM32F10x?
The standard assembler file provided for the chip didn't work (lots of unknown identifiers), so I took the one from the STM Standard peripheral library and modified it as follows:
; Due to a general development environment defect (unlicensed IAR) the vector table
; options are inaccessible from the menus
; This vector table and memory map file is therefore in conflict with the file D:\Program
; Files\IAR Systems\Embedded Workbench 6.5\arm\src\lib\thumb
; Stage 2 fails to run properly with the standard file, even using the usual "keep section" flags.
    MODULE  ?cstartup
        ;; Forward declaration of sections.
        SECTION .intvec:CODE:NOROOT(2)
        PUBLIC  __vector_table
        EXTWEAK __iar_init_vfp
        EXTWEAK __iar_init_core
        EXTERN  __iar_program_start
        EXTERN  __cmain
        ;; EXTERN  __iar_program_start
        ;; EXTERN  SystemInit       
        ;; PUBLIC  __vector_table
unchanged assembler afterwards, except removed references to FSMC vectors (as it is said to be absent from my MCU STM32F10C_series - CD00191185)

SPI_MASTER_Buffer_Rx, SPI_MASTER_Buffer_Tx, MAX11040 are extern variables, for every file they are used in, except the header files where they are actually declared

What am I doing wrong in my calls to functions from the interrupt processing routines?
Any call to a function from here results in random behavior or a hard fault...
  * @brief  This function handles External line 0 interrupt request.
  *         from MAX11040 ADC
  * @param  None
  * @retval None
void EXTI0_IRQHandler(void)
uint32_t empty[4]={0};
uint8_t dummy=0;
if((NVIC_GetPendingIRQ(EXTI0_IRQn)==1) || EXTI_GetITStatus(EXTI_Line0)!=RESET)
    /* Clear the  EXTI line 0 pending bit */
      /* Configure the BASEPRI register to 0x40 (Preemption priority = 1).
         Only IRQ with higher preemption priority than 1 are permitted. */
    /* Read a packet */
    MaxAdcManiReg(&MAX11040 , SPI_MASTER_Buffer_Rx, (uint16_t)MAX11040_DATAREG_SIZE_B, SPI_MASTER_Buffer_Tx, MCMD_R_DATAREG);
//uint8_t MaxAdcManiReg(SPI_group* GSPIx, uint8_t *ibuffer, uint16_t len, uint8_t* obuffer, uint8_t command);
    /*TODO: optimal PPS - use timer instead of polling(here)*/
    Data_Split(empty, SPI_MASTER_Buffer_Rx ,Datalogger_PPSState());
    __set_BASEPRI(0x00); // return to pending status

What am I doing wrong with the memory mapping(?) - sometimes my main() starts going into interrupt processing during debug even without interrupts being configured first...