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STM32F4 Discovery I2S DMA FIFO Error issues

Question asked by Phil Quinton on Feb 8, 2014
Latest reply on Feb 14, 2014 by Phil Quinton
I'm currently testing  I2S between two F4 Discovery development boards.

One board is master, running DMA, one is slave. 
Both are configured with the same sample set for verification purposes, so the data sent can be validated at the slave end. The sample set is 29 x 16-bit values that get transferred in one DMA sitting, and then started again.

I've not got FIFO configured, and I believe I've got DMA configured first, enabling I2S last ( I've read the F4 is sensitive to the order DMA and I2S/SPI is enabled ).

I'm using SPI2 for I2S, DMA 1 Stream 4 Channel 0. No other DMA is being used.

On the Master I'm getting some strange DMA FIFO Errors being thrown  (DMA_FLAG_FEIF4) when running at higher I2S sample rates:

48k - I get one FIFO Error when DMA is enabled and then everything runs fine.
96k - 1 or 2 FIFO Errors per second
192k - Lots of FIFO Errors.

Has anyone come across this before, or had any dealings with FIFO Errors with SPI/I2S DMA on the F4?