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LIS2DH decoupling Capacitors

Question asked by porat.nir on Jul 8, 2015
On the data sheet it is recommended to add 3 capacitors to the system.
The device core is supplied through the Vdd line while the I/O pads are supplied through the
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 μF aluminum) should
be placed as near as possible to pin 9 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to Figure 5). It is possible to remove Vdd while maintaining Vdd_IO
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I2C or SPI interfaces. When using the I2C, CS must be tied high.
The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) can be
completely programmed by the user through the I2C/SPI interface."

I am using SPI communication ,I can place only two capacitors right next to the Vdd pads,
the third is located about 1 CM from the pad.
is this may be an issue ?