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Understanding alignment in STM32F405xG ld linker script

Question asked by winchenbach.samuel on Jan 10, 2014
Latest reply on Jan 14, 2014 by sung.chen_chung
Hello.  I am looking at STM32F405xG.ld, one of the GNU linker scripts for the ChibiOS project.   I understand this script for the most part but I am very confused by the alignment of the sections.  Namely:
  • Why are output and input sections of the startup and .text output sections aligned to 16 byte boundaries?  I asked in the ChibiOS forum but the response did not make a great deal of sense...  I was told that a single read is 128 bits (16 bytes) so these sections are aligned to avoid reading across one of these boundaries.   Wouldn't that depend on the code being executed?
  • Given the above question... why are the constructors and destructors aligned to 4 byte boundaries?  It seems as though they are executable code, much like the .text section.
  • In terms of the stacks:  I understand from reading the AAPCS: "The stack must also conform to the following constraint at a public interface: SP mod 8 = 0. The stack must be double-word aligned." which may explain why the stack is aligned as it is by the linker... but what happens if the code before a function call pushes a 32-bit value onto the stack?  It seems as though it would no longer be 64-bit aligned.
  • Any particular reason for the 4 byte alignment of input sections in the .data and .bss sections?  I am assuming the compiler handles alignment in each input section.
Thanks for the help!