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Question asked by futureelectronics on Dec 13, 2013
Latest reply on Dec 18, 2013 by futureelectronics
Hello everybody,
i use stm32f100c8 mcu for our design and i have problem with LSE ready problem. 
i used stm32 rtc calendar example from STM32F10x_StdPeriph_Lib_V3.5.0 . For this example, i have this problem. i looked errata and i saw "LSE start-up in harsh environments" section. and i connected 20M ohm resistor parallel to my osc. . Although i connected this resistor, i have still same problem with LSE ready on line

/* Enable LSE */
  /* Wait till LSE is ready */
  while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
In this example
1. why they do not make enable BKP and PWR clocks for accessing backup registers when they try to read first time as follows. Becuase ref manual says that we must enable clocks before accesing backup registers???
if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)

2. Even if i changed this part , i still have problem for LSE ready problem. 
3. And for our other design, interestingly it works sometimes, and sometimes this part does not work. What is the MAIN problem for this? 

What do you suggest for this problem?
Best Regards