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Erratum in errata of STM32F101xC/D/E ?

Question asked by de_vloed.hendrik on Nov 29, 2013
Latest reply on Nov 29, 2013 by de_vloed.hendrik
 
ES0104: STM32F101xC/D/E and STM32F103xC/D/E high-density device limitations


In CD00197763 §2.13.1 it is stated
Clear ADDR by reading SR1 register followed by reading SR3

SR3? Not SR2? I assume this is an erratum in the errata document?

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