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stm32f373 single ended zero reference mode SDADC

Question asked by mj on Jul 8, 2013
Latest reply on Jul 9, 2013 by mj
Just to be sure (because the manual is not very clear in this case..):
When the manual states that in single ended zero reference mode the offset is dependend on gain variations it practically means that i can ac-couple (via capacitor) any ac signal to the SDAC and that the mcu will automatically inject an offset corresponding to the actual gain setting, so that 0 volts will be (at the end) resulting in a value at the mid of the adc range.
It is completely unclear what actually happens in this mode. The manual only states that an offset is injected. Does this happen in the analog section? Does it mean I can superpose it with a negative voltage?