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Imprecise bus fault

Question asked by jo.farmer on Jun 27, 2013
Latest reply on Jul 1, 2013 by jo.farmer
I have recently run into a imprecise bus fault problem as indicated by my hard fault handler. I am using an Olimex STM-P103 development board (STM32F103RB CPU) and there is no OS or RTX present.

I am pretty certain that my issue is not caused by a stack under/over flow problem (my stack has guard regions containing a pattern which I can see has not been corrupted).

Essentially my applciation uses DMA transfers to and from an SPI channel in order to interface with an SD card. In addition I have USART and SYSTICK interrupts occuring and lots of my non-interrupt level code uses bit-banding to access control register bits etc.

I have investigated the problem and I am finding that the store instruction (str R2, [R3]) that causes the problem has somehow got a corrupted R3 value. Its top byte value is changed to 0xFF instead of its usual value of 0x42, hence the hard fault. R3 in this case is the bit-band address of an I/O port used to control an LED. Prior to executing this instruction R3 is loaded from a local variable on the stack so it is possible that the stack value is being corrupted before it is loaded in to R3.

I recently implemented the SD card interface without using DMA transfers and I never got any hard faults at all. In changing to DMA transfers the hard faults have started to appear. Its almost as if a DMA transfer is writting the 0xFF value either to R3 (if that is possible) or to local variable on the stack. In the normal course of events DMA transfers do write the value 0xFF (a clock pattern) to the SD card.

Has anyone else experienced problems similar to these?