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Errata entry needed for STM32F3

Question asked by gary on Jun 7, 2013
Latest reply on Jun 7, 2013 by knik
For DMA_CCRx, halfword and byte write access is broken. In both cases, an interrupt is generated on the instruction following the write instruction. Also, if a byte is written to [15:8], the value is replicated to [7:0].

Here's firmware that reproduces this on STM32F373VCT6-B and STM32F303VCT6-Y:
08000188 <Undefined_Handler>:
8000188: e7fe b.n 8000188 <Undefined_Handler>
800018a: 0000 movs r0, r0
0800018c <Reset_Handler>:
// RCC->AHBENR |= RCC_AHBENR_DMA1EN;
800018c: 4b04 ldr r3, [pc, #16] ; (80001a0 <Reset_Handler+0x14>)
800018e: 695a ldr r2, [r3, #20]
8000190: f042 0001 orr.w r0, r2, #1
8000194: 6158 str r0, [r3, #20]
// ((__IO uint8_t*)&DMA1_Channel4->CCR)[1] = 0x7A;
8000196: 4b03 ldr r3, [pc, #12] ; (80001a4 <Reset_Handler+0x18>)
8000198: 217a movs r1, #122 ; 0x7a
800019a: 7019 strb r1, [r3, #0]
// for (;;) { }
800019c: e7fe b.n 800019c <Reset_Handler+0x10>
800019e: bf00 nop
80001a0: 40021000 .word 0x40021000
80001a4: 40020045 .word 0x40020045

The processor ends up in the Undefined_Handler instead of at the for(;;) loop. And the value in DMA1_Channel4->CCR is 0x00007A7A (should be 0x00007A00).

The workarround is obvious -- only write to DMA_CCRx as 32bit word.

-Gary

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