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Invalid bitband defs in F4 STLIB

Question asked by Jack Peacock on May 16, 2013
Latest reply on Mar 26, 2015 by tarakci.cem
I just spotted some invalid defs in the CMSIS stm32F4xx.h definitions file.  In the section on bitband definitions it has entries for backup SRAM, SRAM2 and CCM SRAM:

#define CCMDATARAM_BB_BASE    ((uint32_t)0x12000000) /*!< CCM(core coupled memory) data RAM(64 KB) base address in the bit-band region  */
  
#define SRAM2_BB_BASE         ((uint32_t)0x2201C000) /*!< SRAM2(16 KB) base address in the bit-band region                              */
  
#define BKPSRAM_BB_BASE       ((uint32_t)0x42024000) /*!< Backup SRAM(4 KB) base address in the bit-band region                         */

The definitions for SRAM2 and BKPSRAM are wrong, and the one for CCM implies that CCM memory is bitband capable, when the ARM manual states only the two 1MB regions for regular SRAM and peripheral registers (which includes backup SRAM) are valid.

A heads-up to anyone using bitband on an F4, don't use these definitions.  The SRAM (or SRAM1) and PERIPH definitions work fine.
  Jack Peacock

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