AnsweredAssumed Answered

External clock generation at non-multiple of system clock

Question asked by archer.paul on Apr 8, 2013
Latest reply on Apr 10, 2013 by waclawek.jan
Hi All,
   
I am trying to produce a 256 kHz frequency clock for use with audio codecs. I am trying to produce this 256kHz freq from the 120MHz system clock on the STM32F207 series.

I would like to use the timers to produce this 256kHz clock, however 256kHz does not evenly divide into 120MHz. (120Mhz/256kHz = 468.75)
    
Does anyone know of a way to produce a non-multiple of the system clock by using a combination of timers, and cascading timers.

I have found one way to produce 192MHz from the I2S PLL, and then output on MCO 6.4MHz, which can then be divided down to 256KHz, but this requires two pins, 1 for the MCO pin and 1 for external clock input. I would prefer to be able to just use internal timers and get back two micro controller pins.

Any help find a solution to this would be great.

Outcomes