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STM32F407VGT6 DMA register

Question asked by Johnny on Mar 5, 2013
Latest reply on Sep 21, 2015 by Balas
Hello everyone,
at the moment I work with the STM32F407VGT6 by using the "stm32f4x7_eth_lwip" demo which is shared by STM. The example projectthat i tryed was "tcp_echo_server"


My problem with all demos which are using ethernet is the  ETH_SoftwareReset(); (stm32f4x7_eth_bsp.c  row:95)
while (ETH_GetSoftwareResetStatus() == SET); (stm32f4x7_eth_bsp.c  row:95)
there he expect a sofware reset by setting the reset bit.
If i follow up to reset operations in stm32f4x7_eth.c I found the problem in the DMA register


void ETH_SoftwareReset(void)
{
  /* Set the SWR bit: resets all MAC subsystem internal registers and logic */
  /* After reset all the registers holds their respective reset values */
  ETH->DMABMR |= ETH_DMABMR_SR;
}


/**
  * @brief  Checks whether the ETHERNET software reset bit is set or not.
  * @param  None
  * @retval The new state of DMA Bus Mode register SR bit (SET or RESET).
  */
FlagStatus ETH_GetSoftwareResetStatus(void)
{
  FlagStatus bitstatus = RESET;
  if((ETH->DMABMR & ETH_DMABMR_SR) != (uint32_t)RESET)
  {
    bitstatus = SET;
  }
  else
  {
    bitstatus = RESET;
  }
  return bitstatus;
}



So I look in reference manual of the STM32F4xx on page:910      28.8.4 DMA register description.
There is indicated a Reset value: 0x0000 2101 but my debuger shows me the value: 0x0002 0101.
So the result is a continuous loop.
I am desperately, someone has an idea how to fix that problem?!
thank you for your help
Jonas

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