Question asked by Ram on Feb 26, 2013
Latest reply on Sep 20, 2015 by anofriev.grisha.002

WE ARE USING STM32F373VCT6 LQFP IC

43 - SDSDC1-AIN0P     ------  INPUT6

VREF =1.8V INTERNAL

AS WE HAVE OBSERVED CROSS TALK BETWEEN THE CHANNELS

IF WE APPLY CONSTANT DC VOLTAGE TO THE ONE INPUT SAY INPUT1 .

AND NOW WE VARY INPUT VOLTAGE AT ANY OTHER INPUTS THEN COUNTS AT “INPUTS1” GET CHANGED. WHILE INPUT VOLTAGE AT THIS PIN REMAIN SAME .

VREF =INTERNAL 1.8V

PGA CONFIGURED =1 ;

 AIN VOLT COUNT AT INPUT1 INPUT1 0.752V 28008 INPUT2 170mV INPUT3 190mV INPUT1 0.752V 27982 INPUT2 170mV INPUT3 190mV INPUT1 0.752V 27996 INPUT2 170mV INPUT3 190mV

ALSO  I HAVE OBSERVED THAT IF I CONFIGURE ONLY ONE  INPUT 1  AS ANALOG INPUT  REMAINING  INPUTS CONFIGURED  AS OPEN  DRAIN DIGITAL  INPUTS . NOW ONLY SINGLE  ADC  CHANNEL IS THERE .BUT  HERE ALSO WHEN I VARY VOLTAGE “ 0V” TO “1.8V”   ON OTHER INPUTS(WHICH ARE CONFIGURED AS DIGITAL INPUTS)  THEN ALSO COUNTS ON ADC INPUT1 CHANGES.

PLEASE  GUIDE  ME TO OVERCOME THIS PROBLEM.

I HAVE ALSO ATTACHED ANALOG CIRCUIT WHICH  WE ARE USING .

#include "stm32f37x.h"

#define PT100_CH1_PIN      GPIO_Pin_8
#define PT100_CH1_PORT     GPIOE

#define PT100_CH2_PIN      GPIO_Pin_7
#define PT100_CH2_PORT     GPIOE

#define PT100_CH3_PIN      GPIO_Pin_9
#define PT100_CH3_PORT     GPIOE

#define PT100_CH4_PIN      GPIO_Pin_10
#define PT100_CH4_PORT     GPIOE

#define PT100_CH5_PIN      GPIO_Pin_11
#define PT100_CH5_PORT     GPIOE

#define PT100_CH6_PIN      GPIO_Pin_12
#define PT100_CH6_PORT     GPIOE

GPIO_InitTypeDef GPIO_InitStructure;

DMA_InitTypeDef DMA_InitStructure ;

NVIC_InitTypeDef NVIC_InitStructure;

//////////////////////////////////////////////////////
vu32 Inje_Dma_Data[20],average_Data;

vs16 Inj_Conv_Data[20] ;
////////////////////////////////////////////////////

void TIM19_Config(void);  //EXTERNAL TRIGGER FOR SDADC
void DMA2_CONFIG(void) ;
void Delay_SW(vu32 nCount);
void cal_avrg(void) ;

void Delay_SW(vu32 nCount)
{
for(; nCount!= 0;nCount--);
}

void main(void)
{
//rcc is configured for 72 Mhz
TIM19_Config() ;
DMA2_CONFIG()  ;
while(1)
{
{
cal_avrg();
}
}
}
////////////////
void cal_avrg(void)
{
average_Data=0;
rd_num=0 ;
for(rd_num=0;rd_num<20;rd_num++)
{
Inj_Conv_Data[rd_num]= (vs16)(Inje_Dma_Data[rd_num]);

}
average_Data=average_Data/20 ;

}

///////////////////////////////
{

RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);

RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOE, ENABLE);

//only one channel is configuerd as adc input all other five input ihave configured as
//open drain digital input . for checking .
GPIO_InitStructure.GPIO_Pin   = PT100_CH1_PIN;
GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(PT100_CH1_PORT, &GPIO_InitStructure);

Delay_SW(1000);

Delay_SW(1000);

Delay_SW(1000);
}

void TIM19_Config(void)
{
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;

/* Enable TIM19 clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM19, ENABLE);

/* TIM19 Configuration */
TIM_DeInit(TIM19);

/* Fills each TIM_TimeBaseInitStruct member with its default value */
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);

/* Time base configuration: MPX2102_SDADC will be triggered each sysclk/Period
= 72MHz/20000 = 3.6 KHz */
TIM_TimeBaseStructure.TIM_Period = 20000 ;//277 micro sec per sample
TIM_TimeBaseStructure.TIM_Prescaler = 0  ;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM19, &TIM_TimeBaseStructure);

/* PWM1 Mode configuration: Channel2 (OC2) */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 20000;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC2Init(TIM19, &TIM_OCInitStructure);

/* Enable TIM19 counter */
TIM_Cmd(TIM19, ENABLE);
}
///////////

void DMA2_CONFIG(void)
{

/* DMA1 clock enable */
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2 , ENABLE);

/* DMA2 Channel3 Config */
DMA_DeInit(DMA2_Channel4);
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = 20;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init(DMA2_Channel4, &DMA_InitStructure);

// Enable the DMA1 Channel1 Interrupt
NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel4_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 4;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);

/* DMA1 Channel1 enable */
DMA_Cmd(DMA2_Channel4, ENABLE);
DMA_ITConfig(DMA2_Channel4, DMA_IT_TC, DISABLE);

}