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Quick STREX question

Question asked by ginsburg.daniel on Feb 8, 2013
Latest reply on Feb 8, 2013 by ginsburg.daniel
Hi,

I have a quick quiestion: my toolchain complains that instruction
strexb r2, r2, [r3]
is illegal (registers may not be the same), while
strex r2, r2, [r0]
is fine.

The question is: is it toolchain's bug, or it is telling my the truth?

Background info.

I have a very straightforward read-modify-write code for 32-bit locations like:
uint32_t ttt1(volatile uint32_t *ptr) {
    uint32_t temp;
    do {
        temp = __LDREXW(ptr);
    } while(!__STREXW(temp + 15, ptr));
    return temp;
}


which compiles to
.L2:
        ldrex r3, [r0]
        add     r2, r3, #15
        strex r2, r2, [r0]
        cmp     r2, #0
        beq     .L2
        mov     r0, r3
        bx      lr

This passes assembler just fine.

And for 8-bits:
uint8_t ttt2(volatile uint8_t *ptr) {
    uint8_t temp;
    do {
        temp = __LDREXB(ptr);
    } while(!__STREXB(temp + 15, ptr));
    return temp;
}

which translates to
        mov     r3, r0
.L9:
        ldrexb r0, [r3]
        uxtb    r0, r0
        add     r2, r0, #15
        strexb r2, r2, [r3]        <<<<<<<
        cmp     r2, #0
        beq     .L9
        bx      lr

Now the assembler complains about the marked instruction.

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