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STM32L unstable at high frequencies

Question asked by palmer.david on Dec 11, 2012
Latest reply on Dec 11, 2012 by palmer.david
My STM32L151RCT seems to become unstable when I set the SYSCLK to PLL=26MHZ.
Lower frequencies (say, 20MHZ) appear to be solid.

The failure mode is inconstantly a HardFault, or stack pointer gets corrupted after a few minutes of operation. It's a little hard to tell because the debugger loses its marbles.

I am setting the VCORE to 1.8V using
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
PWR->CR = PWR_CR_VOS_0;
while((PWR->CSR & PWR_CSR_VOSF) != RESET);

PLL settings are HSE=20MHZ, RCC_PLLMul_4, RCC_PLLDiv_3

I'm pretty sure SYSCLK is actually 20MHZ when it works and 26MHZ when it doesn't because I can output a fraction of it on the MCO pin and measure with a scope.

The VDD pin measures 3.3V.

In the datasheet I don't see anything I must do to operate at high frequencies other than setting VCORE. It looks to me like PCLK HCLK and Flash wait states can be anything.

Is there some required setting I am missing?

DP

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