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SPI Transmission Problem

Question asked by hackme on Oct 23, 2012
Latest reply on Oct 24, 2012 by waclawek.jan
I've got an STM32F103 chip transmitting SPI. It works fine most of the time. It's configured to be idle low. It is idle low when transmitting most values, but when I transmit the value 0b1000000, the data line goes high on the last falling edge of the clock signal. I'm pretty sure this is giving my shift register fits. Anybody know how to fix this problem?