To erase a sector, follow the procedure below:
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the FLASH_SR register
2. Set the SER bit and select the sector (out of the 12 sectors in the main memory block) you wish to erase (SNB) in the FLASH_CR register
3. Set the STRT bit in the FLASH_CR register
4. Wait for the BSY bit to be cleared
The last step states we have to wait until BSY bit is cleared in the FLASH_SR register meaning we have to sit in a loop reading the FLASH_SR register until the BSY bit is cleared. Here is where need some clarification.
The Flash programming manual also states that we can’t access/read the flash when the write operation is taking place. If our code for programming flash resides in flash, how can we read the FLASH_SR register to check the BSY bit is cleared if we can’t access from it (bus stall is mentioned).
Does that mean flash erase routines have to be moved to internal SRAM to check the FLASH_SR register OR does the M3 processor automatically fetch the instruction to read FLASH_SR after the erase is completed.
If this is the case, can it be guaranteed that there won’t be any unforeseen issues in this polling loop trying to read the FLASH_SR register when the erase operation is taking place.